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1 parent dc1c683 commit bc19987Copy full SHA for bc19987
examples/llava/qwen2_vl_surgery.py
@@ -6,11 +6,11 @@
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from gguf import *
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from transformers import (
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AutoProcessor,
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- Qwen2VLForConditionalGeneration,
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- Qwen2_5_VLForConditionalGeneration,
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- Qwen2VLProcessor,
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Qwen2VLConfig,
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- Qwen2_5_VLConfig,
+ Qwen2VLProcessor,
+ Qwen2VLForConditionalGeneration,
+ Qwen2_5_VLConfig, # type: ignore[reportAttributeAccessIssue]
+ Qwen2_5_VLForConditionalGeneration, # type: ignore[reportAttributeAccessIssue]
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)
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