[Hardware][Apple-CPU] Enable native bfloat16 on Apple Silicon (M2 and later) #24129
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Code Review
This pull request enables native bfloat16 support on Apple Silicon M2 CPUs and later by checking for the hw.optional.arm.FEAT_BF16 sysctl key. This is a valuable addition that was previously marked as a TODO. My main feedback is to make the sysctl check more robust by handling potential exceptions, which would prevent crashes on systems where the check might fail. I've added a specific comment with a code suggestion for this.
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Signed-off-by: ignaciosica <[email protected]>
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cc @bigPYJ1151 |
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@ignaciosica sorry for the late. Please fix the failed format check https://github.com/vllm-project/vllm/actions/runs/17473335720/job/49626975155?pr=24129 |
Signed-off-by: ignaciosica <[email protected]>
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no worries! |
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Purpose
This PR adds bfloat16 (bf16) support for Apple M-series CPUs, based on a sysctl capability check.
According to the LLVM commit, bf16 instructions are supported on Apple Silicon CPUs starting with the M2 generation.
Details
The necessary
cpu_extension.cmakechanges were already addressed in #21195.Previously, basic offline inference in native bf16 (e.g., with Qwen/Qwen3-0.6B) would fall back to float16:
With this update, bf16 models now run natively on supported M-series CPUs.