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Add dcsr support #342
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Add dcsr support #342
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Thanks for your contribution! Please, find my comments attached.
- Implemented the dcsr CSR (0x7b0) with all fields as per RISC-V Debug Spec v0.13 - Added enums for cause and prv fields for type-safe access - Provided getters and setters for all readable/writable fields - Added unit tests for bitfields, enums, and convenience methods
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Same here: please, do NOT remove anything from the riscv/riscv/CHANGELONG.md
file. This file is essential to keep track of changes in the crate across releases. Please, only add on the top (on the [Unreleased]
tag) your new contributions.
I hope the changes I have made for the CHANGELOG.md are fine now. If there are still problems I will be happy to fix them. |
Hey @KushalMeghani1644 take a look at the changes in your PR: https://github.com/rust-embedded/riscv/pull/342/files Notice that changelog files are wrong; you included a file at the root of the directory of this repo that is not required. Also, you almost removed all the content in the changelog file inside the Please, try to be careful with these changes, and address the comments reviewers included in previous reviews. Our time is limited, and we really appreciate it if contributors make our lives a little bit easier. |
As an example of good practices, look at this PR: https://github.com/rust-embedded/riscv/pull/343/files
We expect something like this to enable the actual review of the contribution. |
Hey @romancardenas I am sorry for the inconvenience regarding the CHANGELOG.md, thanks for putting time into my PR. This time I have only kept the CHANGELOG.md with reference to the PR you pointed out (https://github.com/rust-embedded/riscv/pull/343/files) inside the subfolder. And have removed the unnecessary CHANGELOG.md that was at the root of the folder. I hope the changes I made this time are fine. |
This PR adds support for the
dcsr
(Debug Control and Status Register) CSR.Changes:
dcsr.rs
undersrc/register/
register.rs
This addresses issue #1