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[rocm][V0] fix selection logic for custom PA in V0 #16426
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Signed-off-by: Divakar Verma <[email protected]>
👋 Hi! Thank you for contributing to the vLLM project. 💬 Join our developer Slack at https://slack.vllm.ai to discuss your PR in #pr-reviews, coordinate on features in #feat- channels, or join special interest groups in #sig- channels. Just a reminder: PRs would not trigger full CI run by default. Instead, it would only run Once the PR is approved and ready to go, your PR reviewer(s) can run CI to test the changes comprehensively before merging. To run CI, PR reviewers can either: Add 🚀 |
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LGTM. Let's make sure that we run the AMD CI on this PR before merging
/ready |
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Could we just improve the comment as the logic is a little obscure?
and (not envs.VLLM_USE_V1 or sliding_window == 0 | ||
or sliding_window == (-1, -1)) |
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Do you mind adding a comment here? Something like: "custom paged attn always supported on V0, only [with(out)...] sliding window on V1"
- where the [...]
is a short description of why the sliding window checks are there
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Done
Signed-off-by: Divakar Verma <[email protected]>
Signed-off-by: Divakar Verma <[email protected]>
Signed-off-by: Divakar Verma <[email protected]> Signed-off-by: Yang Wang <[email protected]>
Signed-off-by: Divakar Verma <[email protected]>
Signed-off-by: Divakar Verma <[email protected]>
Signed-off-by: Divakar Verma <[email protected]> Signed-off-by: Agata Dobrzyniewicz <[email protected]>
Signed-off-by: Divakar Verma <[email protected]> Signed-off-by: Mu Huai <[email protected]>
This PR enables custom Paged Attention for vLLM-V0
When measured on
Mistral-7B-v0.1-FP8-KV
for input=2048, output=128, bs=128, the e2e latency difference is about 2-3x before and after this PR.This extends the previous PR: #15982